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Substrate Noise suppression Techniques for Systems on Chip
Shahab Ardalan

As “System-on-Chip” designs are becoming popular, the substrate noise topic has attracted much attention in the past. Even today, a significant research effort is devoted to mitigate the impact of mostly digitally generated substrate noise on sensitive mixed-signal circuits.

In mixed-signal circuits, complex and noisy digital circuits are integrated on the same substrate with noise-sensitive analog circuits. In fact, it is possible for the noise-inducted currents injected into the common substrate, to result in operational/functional failures of the analog and digital blocks. For example, suppose that we have DSP block, which is switching very fast in the vicinity of a broadband receiver. We can observe that there are some unwanted frequency components with considerable magnitude in the receiver spectrum due to substrate noise degrading the performance.

From designers' perspective, one would like to find circuit and physical level techniques to protect sensitive circuits from substrate noise effects.

This tutorial covers brief introduction to substrate noise sources and effects, then gives more details about existing substrate noise reduction techniques in two different categories: i) circuit-level, ii) physical level following by discussion on results of scaling on substrate noise and conclusion at the end.

Code: 4C
Cost: US $150 (Please check tutorials fees)

Shahab Ardalan (SM'01, M'03) completed his B.Sc., and M.A.Sc. degrees at Amirkabir University of Technology, Tehran, Iran and Ryerson University, Toronto, Canada in 1999 and 2003 respectively, in Electrical Engineering.

He is currently pursuing his Ph.D. degree at the University of Waterloo , Waterloo , Canada . Mr. Ardalan's research is focused on low-power, high-speed clock and data recovery circuits in CMOS process, and low-voltage, low-power implantable biomedical telemetry. His research has led to several publications including more than 10 IEEE papers. His is winner of best project award in 2002, best paper award of ICUE in 2004 and Strategic Microelectronics Council of ITAC, CMC Industrial Award in 2005, Mr. Ardalan is holding postgraduate scholarship from National Sciences and Engineering Research Council of Canada (NSERC 2004-2007). He is currently acting as vice-chair in IEEEKW-section and adjunct lecturer at University of Waterloo .


August 6 - 9 , 2006, The San Juan Marriott Hotel. San Juan, Puerto Rico