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Design-for-Test of Mixed-Signal Integrated Circuits
Adoración Rueda and José L. Huertas
What to test and what does test need for a complex mixed-signal ASIC are the two main issues this tutorial will try to focus. It will account for several factors:
  • Stimuli generation. An efficient test procedure would use a single signal especially a signal that is easily supplied to a selected input or generated on-chip.
  • Sufficient access. It is preferable to have access to several internal nodes that the tester can read either sequentially or in parallel. Such access permits selection of convenient test points.
  • Single test output. The output should contain all the information required to interpret test signals. Having the information digitally encoded would also reduce tester requirements.
  • Simple measurement set. This set must contain sufficient information about the circuit under test's operational status.
  • System-level decomposition. An efficient test procedure will employ a system-level strategy for decomposing the ASIC into meaningful parts. This decomposition permits testing of each part using a common procedure. These issues are worth attention for specific circuit classes, since there is no universal method valid for any kind of analog and/or mixed-signal function.

These factors and their application for solving testing problems in general or for specific circuits will be presented and discussed. In particular, during the presentations making part of this tutorial, more attention will be paid to integrated filters (Switched-Capacitor and continuous-time), integrated A/D and D/A converters, and PLLs.

Code: 4E
Cost: US $150 (Please check tutorials fees)

Adoración Rueda obtained the Licenciado en Física degree and the Ph.D degree in 1975 and 19782, respectively, both from the University of Seville, Spain. Since 1976, she has been with the Departamento de Electrónica y Electromagnetismo, Univ. of Seville , Spain , where she is now a Full Professor in Electronics. In 1989, she became researcher at the Department of Analog Design of the National Microelectronics Center (CNM-CSIC), now Institute of Microelectronics at Seville (IMSE).

She has participated in several research projects financed by the Spanish Government, and by different programs of the European Community. She has published many technical papers in international journals and major conferences or books. In 1992 she won the Best Paper Award of the 10 th IEEE VLSI Test Symposium. Her research interests currently focus on the topics Design and Test Techniques for Analog and Mixed-Signal Circuits, and Behavioral Modeling of Mixed-Signal Circuits. She is a member of the IEEE and the TTTC, and she has participated in technical or organizing committees for several international conferences and workshops.

José L. Huertas received the Licenciado en Física degree and the Ph.D degree in 1969 and 1973, respectively, both from the University of Seville, Spain. From 1970 to 1971 he was with Philips International Institute, Einhoven, The Netherlands, as a postgraduate student. Since 1971, he has been with the Departamento de Electrónica y Electromagnetismo, Univ. of Seville , Spain , where he is now a Full Professor. He is also the Director of the Institute of Microelectronics at Seville (IMSE), belonging to the National Microelectronics Center (CNM-CSIC). His current research interests include the design and testing of analog/digital integrated circuits, computer-aided IC analysis and design, fuzzy logic, nonlinear microelectronics, and neural networks. He is a Fellow IEEE member

August 6 - 9 , 2006, The San Juan Marriott Hotel. San Juan, Puerto Rico